R4600
 | This article includes a list of general references, but it lacks sufficient corresponding inline citations. (March 2014) |
The R4600, code-named "Orion", is a microprocessor developed by Quantum Effect Design (QED) that implemented the MIPS III instruction set architecture (ISA). As QED was a design firm that did not fabricate or sell their designs, the R4600 was first licensed to Integrated Device Technology (IDT), and later to Toshiba and then NKK. These companies fabricated the microprocessor and marketed it. The R4600 was designed as a low-end workstation or high-end embedded microprocessor. Users included Silicon Graphics, Inc. (SGI) for their Indy workstation and DeskStation Technology for their Windows NT workstations. The R4600 was instrumental in making the Indy successful by providing good integer performance at a competitive price. In embedded systems, prominent users included Cisco Systems in their network routers and Canon in their printers.
History
[edit]IDT was the first company to fabricate and ship the R4600. IDT produced first silicon in August 1993. The first part was a 100 MHz part announced in October 1993. In March 1994 at CeBIT, IDT announced a 133 MHz part. Both were fabricated in a 0.65 μm CMOS process and required a 5 V power supply. NKK announced their version of the R4600, the NR4600, in the middle of 1994. The first NR4600 was a 100 MHz part fabricated in a 0.5 μm process that used a 3.3 V power supply.
Description
[edit]The R4600 is a scalar processor, issuing up to one instruction per cycle to its integer pipeline or floating-point unit (FPU). In order to save on die area and thus cost, the R4600's FPU is mostly not pipelined, severely limiting its floating-point performance.
Most integer instructions have a single cycle latency and throughput, while single and double precision floating-point additions have a four-cycle latency and throughput. Both integer and floating-point multiplication and division are performed using the floating-point unit.[1] Multiplies are partially pipelined, having an eight-cycle latency and a six-cycle throughput for both 32- and 64-bit operations. Divides a latency and throughput of 32 cycles for 32-bit integers/single-precision floats, and 61 cycles for 64-bit integers/double-precision floats. Square roots have a latency and throughput one cycle less than comparative divide instructions.[citation needed]
The R4600 has 16 kB two-way set-associative caches for instructions and data. The CPU can support a second-level cache, although it does not provide the necessary logic to control it, requiring external logic (provided for example by the chipset). Cache resides on the 64-bit wide SysAD (System Address Data) bus, which can operate at clock rates up to 150 MHz for a peak bandwidth of 600 MB/s,[2] and is part of the R4600's external interface. The R4600 needs to be supplied with three clock signals to generate various internal clocks. Multiprocessing is not supported.
SGI offered a reference design in the form of the UltraP module, aimed at OEMs, permitting R4600 and R4400 processors to work in systems designed for Intel's Pentium processor by employing bus translation logic. As originally announced, the module featured both Pentium and R4600 processors, with the Pentium used for initialisation and booting to DOS, and then either the Pentium or R4600 being selected to run an operating system. Subsequent versions were to offer switching between concurrently running operating systems.[3]
R4650 and R4640
[edit]
The R4650 was a derivative of the R4600 announced on 19 October 1994. It had custom instructions for improving the performance of fixed-point digital signal processing (DSP) applications. A lower cost version of the R4650, the R4640, was announced on 27 November 1995. It had a 32-bit, instead of a 64-bit, external interface. On 16 September 1997, 150 and 180 MHz versions of both microprocessors were introduced. In quantities of 10,000, the 150 and 180 MHz R4640s were priced at $30 and $39 each, respectively. The 150 and 180 MHz R4650s were priced at $60 and $74, respectively. The R4650 was also available in 133 and 167 MHz speeds.
These versions of the R4600 processor were used in some arcade games produced by Namco (for example Time Crisis II running on Namco's System 23 hardware). The R4640 was used by WebTV Networks for their WebTV thin clients for the first couple years of its life. R4640 CPUs manufactured by IDT were use in the original WebTV Classic boxes manufactured by Sony and Philips Magnavox in 1996, as well as most of the WebTV Plus boxes before WebTV Networks switched to RM5230 processors circa late 1998. Around the same time, Classic boxes also started being manufactured with R4640 processors from NKK instead of IDT.
R4700
[edit]
The R4700, also code-named "Orion", was a derivative of the R4600 ported to a 0.5 μm CMOS process. The R4700 was available in 100, 133, 150, 175 and 200 MHz versions. The RV4700 has reduced supply voltage of 3.3 V instead of 5.0 V.
References
[edit]- ^ "Orion IDT79R4600" datasheet. p. 3.
- ^ "Orion IDT79R4600" datasheet. p. 7.
- ^ "MIPS Technologies Announces OEM Reference Design To Upgrade PCs From Pentium to MIPS for 3.5 X Performance" (Press release). Silicon Graphics, Inc. 28 June 1994. Archived from the original on 6 June 1997. Retrieved 9 June 2024.
- "IDT debuts Orion R4600". (25 October 1993). Electronic News.
- "IDT pushes Orion MPU to 133MHz; sets 3.3V plans". (21 March 1994). Electronic News.
- DeTar, Jim (31 October 1994). "IDT launches new Orion MPU spins". Electronic News.
- Gwennap, Linley (22 January 1996). "R5000 Improves FP for MIPS Midrange". Microprocessor Report.
Further reading
[edit]- "IDT Spins R4600 for Consumer Market". (14 November 1994). Microprocessor Report.
- Gwennap, Linley (18 November 1992). "New MIPS Chip Targets Windows NT Boxes". Microprocessor Report.
- Halfhill, Tom R. (December 1993). "New RISC Chips for Windows NT". Byte Magazine.