Terahertz Chip Promises Big Power Without Big Lenses

Terahertz waves have been proposed as a powerful tool to quickly transfer giant volumes of data in potential 6G networks and to see through solid matter, like X-rays—only without the hazardous ionizing radiation. Actually implementing these ideas as real-world applications, however, has proven difficult. Now, a research team says it’s bringing the terahertz dream closer to reality with a device that can put powerful terahertz waves on a chip.

Terahertz waves inhabit a neglected section of the electromagnetic spectrum between microwaves and far infrared light, usually in the range of 0.1 to 10 terahertz. Apart from having the ability to penetrate many materials, terahertz waves have higher frequencies than radio waves, which allow them to transmit more information. The downside to terahertz waves is the challenging physics of harnessing them. They are quickly absorbed by water vapor in air, experience losses in commonly used electronics materials such as copper, and the methods of generating these frequencies are often large or can only produce them at low power.

This problem is evident when trying to generate terahertz waves in chips because of the difference between the dielectric constant in the silicon and the air. The term dielectric constant refers to a material’s ability to concentrate an electric field. When a wave meets a boundary between materials with different dielectric constants, part of the wave is reflected, and part is transmitted. The greater the contrast between materials, the greater the reflection. The dielectric constant of silicon is 11.9, much higher than that of air (1), and as a result, terahertz waves are reflected at the interface between silicon and air. This results in significant signal loss.

One workaround is to place silicon lenses on chips to boost radiating power, making terahertz signals propagate farther, but these lenses are expensive and can be larger than the chips themselves.

Boosting Terahertz Waves with Patterned Sheets

Attempting to overcome this limitation, researchers at MIT took a different approach. Instead of a lens, they attached a special patterned sheet to the backside of a chip to boost the transfer of the electromagnetic wave from silicon to air. The sheet contains many holes, making it part silicon and part air and giving it a dielectric constant in between that of silicon and air and allowing most waves to be transmitted rather than reflected. The researchers achieved what they say is higher radiating power than existing devices, and did so without resorting to silicon lenses.

In a paper and slides presented at the recent IEEE International Solid-States Circuits Conference, held in San Francisco in late February, the team outlines how the terahertz radiator device incorporates arrays of on-chip amplifier-multiplier chains, doublers, and broadband bowtie-shaped slotline antennas. That all adds up to a system that produced radiation between 232 and 260 gigahertz.

In addition to the dielectric sheet, the chip uses high-power Intel transistors with a breakdown voltage of 6.3 volts and maximum frequency of 290 GHz, higher than those of conventional CMOS transistors. Mounted on a printed circuit board measuring 51 by 40 millimeters with the dielectric matching sheet exposed at the back, the chip’s peak radiated power was measured at 11.1 decibel-milliwatts, higher than comparable devices in the 200 to 300 GHz band, according to the team.

Dielectric sheets are not a new concept, but a CMOS terahertz source is an ideal scenario for their application, says Jinchen Wang, a graduate student at MIT’s Department of Electrical Engineering and Computer Science.

The radiator is low cost and could be manufactured at scale. Potential application fields include high-resolution radar imaging, broadband wireless transmissions, and better medical imaging.

“The main challenges are temperature and current density management. Currently, the circuit operates under relatively extreme conditions, which reduces the transistors’ lifetime,” says Wang.

“Besides, if we scale the system into a large CMOS array, thermal management will become a critical issue,” he adds. “It requires a more refined heat sink and fan design. However, we anticipate that these challenges can be effectively addressed within the next two to four years.”

Mona Jarrahi, a professor of electrical and computer engineering at University of California Los Angeles who was not involved in the research, calls it “a groundbreaking achievement” in high-frequency electronics.

“This remarkable advancement not only pushes the limits of CMOS technology in the terahertz regime but also offers an unprecedented combination of high output power, low cost, and compact integration,” says Jarrahi.

“Extending this great performance to higher terahertz frequencies remains a challenge that many researchers are tackling. Physical limitations such as cutoff frequency of transistors, device parasitic, and interconnect losses are the main constraints for higher frequency operation.”