VUnit.add_source_files_from_csv() only passes vhdl_standard kwarg to Library.add_source_file(). However, my file gatherer uses .ahd file extensions to denote altera, .xhd to denote xilinx, and so on. I need the file_type available at least so I can tell VUnit that those file types are still vhdl, but all arguments should be available.

So the examples are useful for somethings but say if I want to have nested if statements or make something that generates this verilog:

reg signed [width:0] x [0:width-1];
always @(posedge clock) begin
    x[0] <= 0
end

I've found myself doing a lot of trial and error, reading the source and scouring the existing examples trying to find something that would use these cons

Verilator should only run on Verilog-HDL with proper Verilog file extensions.

maybe a

verilog.lint.include : [".sv", ".v"] //Verilog HDL/SystemVerilog configuration setting

It would be nice to have a ready to run version of the project in EDA Playground. This would require loading the code and setting up the project in EDA Playground. Finally making it ready compile and run.

With all features of the graphics system now implemented:

• VGA 640x480 @ 60 Hz (rendered @ 320x240)
• Sprites + tiles
• Wide/tall sprites
• Bidirectional smooth scrolling
• Tile map wrapping
• Parallax scrolling

A demo should be created showcasing the spread of features to compare with similar embedded systems (e.g. Maccasoft P8X system, Hydra, etc.)

Addt'ly, implementing all featur