#
mips
Here are 865 public repositories matching this topic...
Capstone disassembly/disassembler framework: Core (Arm, Arm64, BPF, EVM, M68K, M680X, MOS65xx, Mips, PPC, RISCV, Sparc, SystemZ, TMS320C64x, Web Assembly, X86, X86_64, XCore) + bindings.
security
arm
framework
mips
x86-64
ethereum
reverse-engineering
disassembler
webassembly
riscv
x86
arm64
sparc
m68k
powerpc
systemz
bpf
m0s65xx
m680x
tms320c64x
-
Updated
Aug 19, 2021 - C
GEF (GDB Enhanced Features) - a modern experience for GDB with advanced debugging features for exploit developers & reverse engineers ☢
python
linux
debugging
exploit
mips
discord
reverse-engineering
gdb
pwn
ctf
python-api
gef
ida-pro
binary-ninja
pwntools
malware-analysis
sparc
powerpc
exploit-development
-
Updated
Aug 15, 2021 - Python
Plasma is an interactive disassembler for x86/ARM/MIPS. It can generates indented pseudo-code with colored syntax.
-
Updated
May 16, 2020 - Python
Binary Analysis Platform
emulator
security
arm
mips
static-analysis
ocaml
reverse-engineering
disassembler
symbolic-execution
bap
x86
dynamic-analysis
binary-analysis
instruction-semantics
program-analysis
taint-analysis
powerpc
program-verification
lifter
-
Updated
Aug 14, 2021 - OCaml
The OpenSource Disassembler
linux
arm
cplusplus
cross-platform
mips
esp32
reverse-engineering
disassembler
qt5
ida
ida-pro
software-analysis
dalvik
binary-analysis
espressif
xtensa
dex
idapro
miniz
assemblers
esp32-idf
libiberty
binutils-demangler
msvc-demangler
-
Updated
Aug 17, 2021 - C++
Simple C compiler
-
Updated
Dec 9, 2020 - C
NonTrivial-MIPS is a synthesizable superscalar MIPS processor with branch prediction and FPU support, and it is capable of booting linux.
-
Updated
Jul 7, 2020 - SystemVerilog
C--compiler which implements LL(1)\LR(0)\SLR\LR(1) and semantic analysis and MIPS generate
-
Updated
Mar 22, 2021 - Python
Simple and lightweight source-based multi-platform Linux distribution with musl libc.
linux
fast
distribution
arm
privacy
cross-platform
simple
mips
linux-distribution
x86
cross-compiler
safe
musl
musl-libc
powerpc
compact
risc-v
-
Updated
Jun 1, 2021 - Shell
pavelkryukov
commented
Mar 18, 2020
Some RISC-V instructions perform writes to 2 destinations, either 2 register or register or program counter. In cases if the source of one sub-operation matches a destination of another one, the order of result output is important. The examples are jalr and instruction operating with CSRs:
riscv/riscv-tests#258
riscv/riscv-tests#263
Your obj
Cross complie shadowsocks for UBNT devices based on mipsel or mips64
-
Updated
Mar 22, 2020 - Shell
A curated list of Nintendo 64 development resources including toolchains, documentation, emulators, example code, and more
c
rust
gamedev
documentation
awesome
nintendo
tools
mips
asm
game-development
assembler
development-kit
resources
cartridge
mips-assembly
awesome-list
rom
n64
nintendo-64
assembly-programming
-
Updated
Aug 19, 2021 - Python
Simple unix-like operating system for education and research purposes
-
Updated
Aug 8, 2021 - C
Improve this page
Add a description, image, and links to the mips topic page so that developers can more easily learn about it.
Add this topic to your repo
To associate your repository with the mips topic, visit your repo's landing page and select "manage topics."
请问可以直接training tmfile出来吗? 因为tengine-convert-tool covert 会有error
tengine-lite library version: 1.4-dev
Get input tensor failed
或是有例子能training出下面tmfile 呢?
![Screenshot from 2021-05-27 07-01-46](https://user-images.githubusercontent.com/40915044/11