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The Sherwood Architecture is a custom 64-Bit RISC based CPU architecture.
A multi-cycle RISC CPU (processor) like MIPS-CPU architecture in VHDL ( a hardware-side implementation )
Updated
Jun 19, 2021
VHDL
VHDL , ModelSIM, Quartus, FPGA, Image Processing
Updated
Jan 19, 2019
VHDL
Μια ενδεικτική υλοποίηση RISC-V επεξεργαστή και ενός υποστηρικτικού Assembler - Διπλωματική εργασία στο Τμήμα Μηχανικών Η/Υ και Πληροφορικής, Πανεπιστήμιο Πατρών / An Indicative RISC-V CPU Implementation and an Accompanying Assembler - Master's Diploma Thesis at the Computer Engineering and Informatics Department (CEID), University of Patras
[2009 – 2012] MDSP: functional simulation of a Multimedia Digital Signal Processor
Tomasulo algorithm visualizer
Updated
Jun 9, 2017
TypeScript
[Computer Engineering] Programmable 8-bit computer based on von Neumann architecture, designed and implemented from scratch in Logisim.
Updated
Jul 11, 2018
VHDL
Basic VHDL projects gradually creating a pipelined CPU running Charis4 instruction set.
Updated
Nov 2, 2021
Verilog
The virtual CPU (and emulator) built for hobbyists
Updated
Sep 3, 2018
Python
A 16 bit SAP-1 CPU that I designed in grade 10 designed in logisim
Trillek Virtual Computer specs
Updated
Jul 20, 2015
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