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bitstream

Here are 53 public repositories matching this topic...

leandromoreira / digital_video_introduction

A hands-on introduction to video technology: image, video, codec (av1, vp9, h265) and more (ffmpeg encoding).

audio learning tutorial compression h264 video ffmpeg hls guide handson dash codec video-codec h265 adaptive-streaming arithmetic-coding vp9 bitstream av1 frame-types

Updated Nov 24, 2021
Jupyter Notebook

prjxray

f4pga / prjxray

Open

Assign xc7 prefix to prjxray tools to avoid conflicts

4

acomodi commented May 25, 2020

All the tools in prjxray should have an xc7 prefix, so to make them unique.

E.g. bitread or bittool could enter in conflicts with other tools names.

Read more

good first issue

Open

Document remaining bits in opentitan bitstream

3

Open

Refactor xjson library

Find more good first issues

trabucayre / openFPGALoader

Universal utility for programming FPGA

fpga intel cyclone xilinx lattice bitstream arty gowin trenz-gowin-littlebee

Updated Apr 11, 2022
C++

boisgera / bitstream

Binary Data for Humans

python binary-data bitstream

Updated Jan 15, 2022
Cython

fasm

chipsalliance / fasm

FPGA Assembly (FASM) Parser and Generator

parser fpga fasm bitstream fpga-assembly symbiflow bitstream-format f4pga

Updated Feb 24, 2022
Python

f4pga / prjuray

Documenting the Xilinx Ultrascale, Ultrascale+ and UltraScale MPSoC series bit-stream format.

fpga xilinx vivado fuzzer xilinx-fpga bitstream ultrascale symbiflow ultrascale-plus

Updated Feb 9, 2022
SystemVerilog

Telecommunication-Telemedia-Assessment / bitstream_mode3_p1204_3

Open source reference implementation of ITU-T P.1204.3

mos machinelearning itu bitstream videoquality

Updated Nov 30, 2021
Python

hex-five / multizone-fpga

This repository contains the hardware design source files of the Hex Five X300 RISC-V SoC. The X300 SoC is Hex Five's official reference platform for its MultiZone Security Trusted Execution Environment and MultiZone Security Trusted Firmware. The X300 is an enhanced secure version of the - now archived - SiFive's Freedom E300 Platform built around the RISC-V Rocket chip originally developed at U.C. Berkeley.

fpga rocket-chip xilinx fpga-soc risc-v xilinx-fpga bitstream digilent e300 artix-100t sifive-freedom arty-a7 artix-35t

Updated Oct 19, 2021
Scala

redheadgektor / RakNet_Networking

Wrapper for the popular network engine RakNet used to this day in many popular games and mods for them with adaptation for the game engine Unity3D

client online server unity multiplayer network unity3d bandwidth raknet net sending data-encryption bitstream receiving rak raknet-network-engine

Updated Oct 23, 2021
C#

nickbabcock / bitter

Sponsor

Extract bits from a byte slice

bits binary-parser bitstream

Updated Mar 4, 2022
Rust

mmiszczyk / deepmage

Hex editor for bit-level occultism

bit-manipulation hex-editor bitstream

Updated Jul 28, 2018
Hy

isabekov / fireprog

A tool for configuring Xilinx Spartan 3 FPGAs via FT232H-based USB-to-JTAG adapter

fpga mingw-w64 jtag cross-compilation bitstream ft232h prometheus-fpga fireprog

Updated Dec 31, 2020
C++

f4pga-bitstream-viewer

chipsalliance / f4pga-bitstream-viewer

Tool for graphically viewing FPGA bitstream files and their connection to FASM features.

xilinx bitstream symbiflow bitstream-viewer

Updated Apr 6, 2022
Python

SymbiFlow / prjxray-bram-patch

Open

Convert to use .json instead of .mdd

nelsobe commented Jun 4, 2020

The testing/mdd_make.tcl program generates a .mdd file which then takes 100 lines of python to parse. Bad use of effort.

Have .tcl output a .json file which can be trivially read. Updates to resulting data structures may be needed (or converted to dictionaries).

Read more

enhancement good first issue High Priority

Open

Merge python and .sh generation scripts into one big python script

Open

Create support for full $readmemb() and $readmemh() syntax

Find more good first issues

agoessling / rules_vivado

Bazel rules for Xilinx Vivado

fpga bazel bazel-rules verilog xilinx vivado xilinx-vivado bitstream rules-vivado

Updated Mar 20, 2022
Python

DicomJ / mpeg-profiler

mpeg-isobmf/mp4 profiling library

parser library cplusplus mp4 mpeg codec hevc profiling bitstream avc 14496-12 14496-14 isobmf

Updated Nov 17, 2018
C++

pengbins / aomanalyzer.io

AV1 Bitstream Analyzer in browser for local ivf/obu/webm bitstream

player video reactjs webm webassembly analyzer codec bitstream av1 ivf obu

Updated Mar 12, 2021
HTML

lastweek / fpga_decode_bitstream

C code to parse xilinx bitstream. See http://lastweek.io/fpga/bitstream/

fpga xilinx bitstream

Updated Sep 17, 2020
C

wkoszek / libxbf

Xilinx Bitstream Format Library. Easily read .bit files from C programs.

fpga vhdl verilog xilinx bitstream

Updated Nov 16, 2015
C

UchuServer / RakDotNet.IO

IO library used by RakDotNet

csharp dotnet raknet bitstream bitmanipulation bitlevel

Updated Dec 29, 2021
C#

herbix / bitstream

Java bit input/output stream

java stream bitstream

Updated Mar 31, 2017
Java

KornnerStudios / KSoft

Migrating from https://bitbucket.org/KornnerStudios/ksoft/

Updated Feb 1, 2022
C#

sorsarre / bitreader-cpp

Bitstream reader implementation in C++

binary-data bitreader bitstream

Updated Mar 24, 2019
C++

Werni2A / Valhalla-II

Open-Source VHDL Synthesis for Alhambra II FPGA Board

open-source fpga vhdl synthesis yosys alhambra digital-design bitstream place-and-route

Updated Nov 30, 2021
VHDL

sergeyrachev / khaotica

Bitstream editor empowered with FLAVOR interpreter

parser cmake binary-data boost parser-generator iso mpeg syntax-tree binaryformat mpegts compiler-design flavor codegeneration bitstream

Updated Sep 20, 2020
C

Notgnoshi / Bitfield

A Python bitfield class for easier bit manipulation of integers

python bitarray bitwise bitfield bitwise-operators bitstream bitfields bitwise-arithmetic bitstring

Updated Jan 19, 2018
Python

f4pga-xc-fasm2bels

SymbiFlow / f4pga-xc-fasm2bels

Library to convert a FASM file into BELs importable into Vivado.

tcl verilog vivado fasm bitstream artix-7 symbiflow

Updated Oct 27, 2021
Verilog

zdzislaw-s / oled-driver-demo

OLED driver demo running on ZedBoard

c-plus-plus sdk zynq hardware animation freertos verilog spi vivado ssd1306 oled-display zedboard xilinx-fpga xilinx-vivado bitstream oled-display-ssd1306 axi4-lite

Updated Jun 24, 2018
PHP

UW-PHARM / BitSAD

A domain-specific language for bitstream computing

scala verilog code-generation compiler-plugin bitstream stochastic-computing

Updated Dec 5, 2021
Scala

mcmayer / haskell-efficient-bitstreams

Repo for a Stackoverflow question about efficient bitstreams

haskell streaming bitstream bytestring

Updated Dec 17, 2018
Haskell

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