5-stage pipelined 32-bit MIPS microprocessor in Verilog

Tutorial series on verilog with code examples. Contains basic verilog code implementations and concepts.

Verilog Design Examples with self checking testbenches. Half Adder, Full Adder, Mux, ALU, D Flip Flop, Sequence Detector using Mealy machine and Moore machine, Number of 1s, Binary to Gray Conversion, Up down counter, Clock Divider, PIPO, n bit universal shift register, 4 bit LFSR, Single port RAM, Dual port RAM, Synchronous FIFO, Asynchronous F…

Synthesizable Verilog Source Codes(DUT), Test-bench and Simulation Results.

the project includes system design of a t intersection traffic light controller and its verilog code in vivado design suite.

This repository contains all labs done as a part of the Embedded Logic and Design course.

30 Days of Verilog: Dive into digital circuits with a month of Verilog coding challenges. From logic gates to FSMs, sharpen your skills and simulate your designs. Let's code and conquer circuits!

Title : Communication Bridge between I2C and SPI Platform : RTL Coding (Verilog/System Verilog/VHDL) Duration : 1 Month Description : Both SPI and I2C are robust, stable communication protocols that are widely used in today's complex systems.The I2C bus has a minimum pin count requirement and therefore a smaller footprint on the board. The SPI b…

Repository for RTL building blocks #100daysofrtl VERILOG VHDL System Verilog

Verilog Programs

Pin-point analysis of the questions given in labs using FPGA and ASIC design.

Config files for my GitHub profile.

This repository contains a few useful Verilog modules

my created fpga verilog samples.

In this Verilog,I will Upload the Verilog codes for Different problem.

A collection of digital circuits using Verilog.

A repository containing new Verilog codes which I learn.

A Verilog HDL code

My ongoing practice verilog hdl codes.

Collection of different verilog programs taught as a part of the Digital Electronics Course.